Changing the two tiles size of gate switch PLM by one

[Vener]

Hello and an happy hacking new year to everyone !

As my title say , i want to keep only the switch tile of the gate interruptors , and removing at all the diode tile that already exist at the top of the shutters .
I guess in the vanilla version of this PLM , it's not possible because the two PLMs have to be connected , but i done a remote version of the gates , as redesign ; so no problem about this .

In the original version as in the mine , i use this part : 

Code Select Expand

C836 (Vanilla switchs)

E0 C6 | AF BC

- MAIN - (02:46E0):

   BE C7 1D   LDX,y $1DC7 (PLM Room argument)
   BD 0A C7   LDA,x $C70A * <this points to PRE inst. stuff .
   99 27 1D   STA,y $1D27 (Next PLM instruction)
   BE C7 1D   LDX,y $1DC7 (PLM Room argument)
   BD 1A C7   LDA,x $C71A **
   F0 08      BEQ +
   BE 87 1C   LDX,y $1C87 (PLM's location in the room (nth block * 2))
   CA         DEX
   CA         DEX
   20 B4 82   JSR $82B4 (Write block type and BTS)
+ BE C7 1D   LDX,y $1DC7 (PLM Room argument)
   BD 2A C7   LDA,x $C72A ***
   F0 08      BEQ ++
   BE 87 1C   LDX,y $1C87 (PLM's location in the room (nth block * 2))
   E8         INX
   E8         INX
   20 B4 82   JSR $82B4 (Write block type and BTS)
++ 60         RTS

*
AF BC <Instructions. PLM C836
B5 BC <          //
BB BC <          //
C1 BC <          //
C7 BC <          //
CD BC <          //
D3 BC <          //
D9 BC <          //

BCAF:01 00 D7 A5 BC 86 <Instruction. Delete PLM
BCB5:01 00 E3 A5 BC 86
BCBB:01 00 EB A5 BC 86
BCC1:01 00 F7 A5 BC 86
BCC7:01 00 FF A5 BC 86
BCCD:01 00 0B A6 BC 86
BCD3:01 00 13 A6 BC 86
BCD9:01 00 1F A6 BC 86

Switchs tile map :

A5D7:01 00 D6 80 FF 00 01 00 DB C0 00 00 <blue left]      (#D6 = diode with no light tile )(#DB = blue switch tile)
A5E3:02 00 D6 80 DB C4 00 00             [blue right>
A5EB:01 00 D6 80 FF 00 01 00 DA C0 00 00 <pink left]      (#DA = pink switch tile)
A5F7:02 00 D6 80 DA C4 00 00             [pink right>
A5FF:01 00 D6 80 FF 00 01 00 D9 C0 00 00 <green left]     (#D9 = green switch tile)
A60B:02 00 D6 80 D9 C4 00 00             [green right>
A613:01 00 D6 80 FF 00 01 00 D8 C0 00 00 <*yellow* left]  (#D8 = grey switch tile)
A61F:02 00 D6 80 D8 C4 00 00             [*yellow* right>

**
46 C0 00 00 <Set BTS# for the 2 PLM blocks
48 C0 00 00
4A C0 00 00
4C C0 00 00

***
00 00 47 C0
00 00 49 C0
00 00 4B C0
00 00 4D C0


* = Tile map of this PLM
** or *** = BTS map of this PLM

In the begin of the main part , there is DEX#2 , i noticed that if i put juste one DEX here , the PLM size become one tile , but it doesn't interprete correctly the map arguments that follow .

What i have to do ?